Research in computing frontiers is fascinating for the preview it gives us of some potential futures of computing. Rethinking some of our fundamental assumptions, like the shift from complex instruction set computers (CISC) to reduced instruction set computers (RISC), has led to some interesting advances. Similarly, the advent of field-programmable gate arrays (FPGAs) allows the rethinking of what the boundary between hardware and software could be.

Here, the authors look at programs that are specified as dataflow-oriented programs, a rather old paradigm; of course, most of today’s hardware is largely concerned with control flow, except for pipelining, which is dataflow oriented. Dataflow brings advantages (easier to parallelize) as well as disadvantages (the need to schedule, as well as being more interpreter driven). But with the right architecture, perhaps this can indeed be made viable.

After reading this paper, I am left with no impression that any progress has been made on this. First, the jargon is jarring: referring to basic components (such as test, cond, and loop) as “actors” ignores a lot of work in programming languages that already uses this term for a much higher-level idea. Second, a single case study (matrix multiplication) of an algorithm with rather well-known communication patterns is unconvincing, especially since people doing distributed numerical analysis have really figured out the optimal bounds for such communication. Third, only considering matrices up to 500 in size is not really interesting, especially as today’s interesting problems in this area start with matrices of size >1,000,000. Finally, all of the timings are relative to the author’s own work and do not compare with anything else. To make things even worse, the number of typographical and grammatical errors is surprisingly high.

While this topic seems interesting, this paper is not one to read to learn more about it.