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Aspect-oriented RTL HW design using SystemC
Mück T., Fröhlich A. Microprocessors & Microsystems38 (2):113-123,2014.Type:Article
Date Reviewed: Apr 27 2015

In object-oriented programming (OOP), software systems are implemented by decomposing a problem into suitable classes. But some concerns of the system, like synchronization and logging, may not fit well in a modular representation. Aspect-oriented programming (AOP) is a successful approach to handling the separation of concerns across class hierarchies.

In the AOP approach, component and aspect are the basic concepts. the application of AOP needs support from tools in the form of aspect weaving, which is the process of inserting special code at locations in the component code where the aspects need to act.

In terms of hardware design, the SystemC language provides OOP features such as inheritance. But debugging, clock handling, and low-power mechanisms are examples of system-wide concerns that need good representation, thus providing motivation for using AOP.

Whereas earlier proposals deploying AOP in hardware design relied on language extensions and/or targeted verification, this paper suggests that the aspect-weaving semantics can be directly implemented using SystemC features, thus making the code synthesizable. The authors have organized the material well and present an innovative coding style for making use of the AOP paradigm.

The first two sections provide an introduction and cover the relevant background. Key constructs that perform the aspect weaving are introduced in section 3. A scenario class represents an execution and incorporates the aspects through aggregation. Then, adaptation of the component to the scenario is performed by inheriting from both those classes in a scenario adapter class. Because virtual methods with runtime checks are not synthesizable, the authors have proposed static polymorphism using the curiously recurring template pattern (CRTP). Also, the inheritance is configurable with the help of traits template classes and metaprogramming techniques.

Section 4 reviews the results from a private automatic branch exchange (PABX) example. Better metrics could have been chosen for comparison. Reusability is measured here by the number of lines of code, and that could easily vary from developer to developer. Synthesis results are compared by the number of field-programmable gate array (FPGA) slices used, and those measurements could be affected by optimizations in the tool chain.

Overall, the style suggested is interesting and could be applicable to new designs until tools support more powerful mechanisms from languages like AspectC++.

Reviewer:  Paparao Kavalipati Review #: CR143392 (1507-0584)
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