Computing Reviews
Today's Issue Hot Topics Search Browse Recommended My Account Log In
Review Help
Search
A novel net-degree distribution model and its application to floorplanning benchmark generation
Wan T., Chrzanowska-Jeske M. Integration, the VLSI Journal40 (4):420-433,2007.Type:Article
Date Reviewed: Sep 26 2007

This paper provides an accurate estimate of interconnect net-degree distribution for multiterminal nets (referred to as a weighted exponential model), and for generating larger floorplanning benchmarks. The proposed technique is an interesting way to generate realistic floorplanning benchmarks: it extends the existing floorplanning benchmarks, and provides a way to keep benchmarks comprised of a large number of blocks realistic. An analytical method for a net generation process and a weight model are presented, and the authors attempt to compare their approach with other similar ones. The benchmark generation, the distribution of the module sizes, and the netlist generation are well studied. Generated benchmarks are validated using two direct and indirect ways. This work is interesting and helpful for designers that need to generate and utilize large floorplanning benchmarks.

I have one suggestion for extending the work. Benchmarks are generally used for studying and evaluating performance. In essence, benchmarks are snapshots of the circuits utilized in the real world. Therefore, one approach for generating benchmarks can be to use the characteristics extracted from the circuits and apply them to the benchmark generation process. This approach, for large real circuits, is sequenced as follows: analyze them, extract their basic characteristics, use these characteristics for determining parameters (like net-degree distribution and weight model), and finally apply them to the benchmark generation process in order to produce the larger benchmarks. Comparing the introduced approach in the paper with this idea may help to highlight the features of each.

Reviewer:  Farhad Mehdipour Review #: CR134769 (0808-0771)
Bookmark and Share
 
Placement And Routing (B.7.2 ... )
 
 
Layout (B.7.2 ... )
 
 
Routing And Layout (F.2.2 ... )
 
 
Design Aids (B.7.2 )
 
 
Interconnections (Subsystems) (B.4.3 )
 
 
Performance Analysis And Design Aids (B.8.2 )
 
Would you recommend this review?
yes
no
Other reviews under "Placement And Routing": Date
A 2d channel router for the diagonal model
Lodi E., Luccio F., Song X. Integration, the VLSI Journal 11(2): 111-125, 1991. Type: Article
Aug 1 1992
Tree placement in Cascode-switch macros
Sarrafzadeh M. Integration, the VLSI Journal 11(2): 127-139, 1991. Type: Article
Oct 1 1992
VYUHA
Ravikumar C., Sastry S. Integration, the VLSI Journal 11(2): 141-157, 1991. Type: Article
Aug 1 1992
more...

E-Mail This Printer-Friendly
Send Your Comments
Contact Us
Reproduction in whole or in part without permission is prohibited.   Copyright 1999-2024 ThinkLoud®
Terms of Use
| Privacy Policy