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A 4 GHz ΔΣ fractional-N frequency synthesizer
Ahola R., Halonen K. Analog Integrated Circuits and Signal Processing34 (2):77-87,2003.Type:Article
Date Reviewed: Jan 8 2004

Recent advances in applications for wireless communications have created demand for high-quality radio frequency synthesizers. In many of the applications, handheld devices are used. This requires that the devices have low noise, require low power, and be miniaturized. The architecture often chosen is the fractional-N phase locked loop. This allows the radio frequency (RF) channels to be equally spaced and provides fast switching between channels. If the system uses phase or frequency modulation, that can be accomplished in the synthesizer.

In general, analog circuits take more space on a chip than digital. So digital circuits are preferred, but some analog circuits are required. Bipolar complementary metal oxide semiconductor (BiCMOS) technology allows the design of analog and digital circuits on the same chip. This reduces the size and required power for the system.

The use of frequency division in the loop feedback path is a major source of noise in the voltage controlled oscillator (VCO) output. A third order MASH &Dgr; &Sgr; modulator is used to control the prescaler, providing a significant reduction in phase noise in the VCO output.

Another noise source is the digital phase detector. There is very little gain near zero phase difference, effectively causing the loop to be open circuited. This causes close-in phase noise in the synthesizer. The type of phase detector used eliminates the dead zone, producing up and down pulses in every cycle of the reference. For zero phase difference, both pulses are of minimum width. When one pulse trails the other, the corresponding output pulse is wider, so there is always an output pulse, eliminating the dead zone.

This transfers the dead zone problem to the charge pump. Its output current is controlled by independent switches, providing outputs down to zero width, so there is no dead zone.

Most of the circuitry is constructed in a BiCMOS chip, whose dimensions are 2.2 millimeters2. Total power used by the chip circuits is 27.7 milliwatts. This does not include the low pass passive loop filter, the output VCO and the reference oscillator are off chip. The close-in phase noise is -66 decibels at 10 kilohertz. Spurs are -39 decibels.

Compared with other recent synthesizers, this device is smaller and uses less power. It is poorer in its close-in phase noise and spurious response levels. The latter may be a result of design tradeoffs required to meet small space and power in a handheld device. In presenting these specifications, the author has said that the system tested did not include the reference oscillator, the loop filter, or the VCO.

Reviewer:  Paul Bennett Review #: CR128867 (0406-0723)
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Signal Analysis, Synthesis, And Processing (H.5.5 ... )
 
 
Signal Processing Systems (C.3 ... )
 
 
Types And Design Styles (B.7.1 )
 
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