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Networks on chip
Jantsch A., Tenhunen H., Kluwer Academic Publishers, Norwell, MA, 2003. 312 pp. Type: Book (9781402073922)
Date Reviewed: Dec 15 2003

A new approach to interconnecting the heterogeneous components that are currently integrated in a single silicon die is presented in this book. The driving force behind such an approach is the need for a reusable on-chip communication infrastructure. Such an infrastructure must enforce communication on a local basis, since long global wires and buses are increasingly being avoided, due to their high susceptibility to deep submicron interconnect issues [1]. Furthermore, as the number of components integrated inside a chip increases (including processor cores, memory, reconfigurable logic, digital signal processing cores, and application-specific logic), the scalability of the interconnection infrastructure starts to play an important role.

The network on a chip (NOC) approach offers a promising alternative to current interconnect structures, for example on-chip buses, by offering a much larger degree of scalability, and by naturally supporting a globally asynchronous, locally synchronous communication scheme. Those advantages are achieved by interconnecting system components with a network-like structure, where data packages are routed through the nodes of such a network, allowing the system components to communicate asynchronously in a message-passing fashion.

The use of NOCs may represent a paradigm shift in integrated systems design, so there are several research groups currently addressing the wide range of issues, from hardware architecture to programming interfaces, that must be solved before the NOC concept can be available as an alternative platform for product design. The major contribution of this book is the overview it provides of the early results of some of these research groups, providing the reader with good insight on which of the potential benefits of the NOC approach can be reached in the near future. Such insights will not be easily achieved, however, if the reader is not familiar with the state of the art in integrated systems design. Although there is an introductory chapter by the editors that provides an outlook on the overall concept of NOCs, the rest of the contributions are independent of each other, and provide in-depth approaches to the different issues in system-level design, hardware infrastructure, and software interfaces. The terminology used by the contributors varies from chapter to chapter, contributing to the heterogeneity of the book. Such a shortcoming can, of course, be excused, since the book covers immature technologies, and a well-defined body of knowledge is not yet established.

Reviewer:  Leandro Soares Indrusiak Review #: CR128764 (0405-0510)
1) Sylvester, D.; Keutzer, K. Rethinking deep-submicron circuitdesign. IEEE Computer 32, 11(1999), 25–33.
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Interconnections (Subsystems) (B.4.3 )
 
 
Miscellaneous (B.7.m )
 
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