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A fault-tolerant multi-transputer system for space applications
Castro H., Gough M. Microprocessors & Microsystems15 (7):361-367,1991.Type:Article
Date Reviewed: Apr 1 1993

The fault-tolerant computer system described here was intended for use as an instrumentation computer on board a Russian mission to Mars in 1994. The system contains four transputer modules (chips). Transputer modules were used because they offer greater resistance to damage by cosmic rays than do other microprocessor chips. Transputer chips have on-chip memory, and connecting transputer chips to form a network is easy, since a link protocol implemented on the chip provides communication between transputer chips. Each transputer chip has four pairs of input-output links: in this system, one pair is connected to instrumentation, and the remaining three pairs are connected to the remaining three transputer modules in the system. Each transputer module is capable of performing its own task as well as the tasks of all the other modules. The system is thus four-parallel. Reliability calculations demonstrate that this system has a higher reliability than other commonly used schemes such as duplex and triple modular redundancy (TMR) schemes. Faulty transputer modules are short-circuited, and their tasks are taken over by healthy transputer modules. The software for the system is written using Occam.

The reader should note that figures 7, 8, and 9 in the paper have incorrect captions. They actually show a TMR system, a duplex system, and a four-parallel system, respectively.

Reviewer:  R. B. Abhyankar Review #: CR116178
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Reliability, Availability, And Serviceability (C.4 ... )
 
 
Interconnection Architectures (C.1.2 ... )
 
 
Parallelism And Concurrency (F.1.2 ... )
 
 
Reliability (D.4.5 )
 
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