Stone takes an architectural approach to such topics as memory designs, pipeline techniques, and parallel structures. The focus is on fundamental bottlenecks--memory bandwidth, processing bandwidth, communications, and synchronization. The book addresses evaluation techniques to help the reader isolate highly efficient techniques from those that are less efficient. Where appropriate, the text draws on examples of real applications and their architectural requirements. Exercises at the end of each chapter give the reader the chance to sketch out designs and evaluate their performance under a variety of technological constraints.

A few machines whose structure is of historical interest could have been skipped, although the author’s purpose in including them was to illustrate how the concepts could be implemented. The book could have included some practical application problems from such areas as machine vision, speech recognition, and image processing. Workers in these areas often find themselves grappling with the question of whether to attempt Monte Carlo simulation or try to generate a modeling scheme that takes advantage of a high-performance architecture. A discussion of recent VLSI applications and architectures would also be welcome, although the book was not intended as a discussion of VLSI.

The book is of a suitable length and fulfills its purpose. It is one of the best works I have read on this subject, with exceptionally good references and an excellent index and glossary. It can be used as a tutorial, a reference, or a textbook.