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	Browse All Reviews > Hardware (B) > Memory Structures (B.3) > Semiconductor Memories (B.3.1)     Semiconductor Memories (B.3.1) See Reviews     Subject Descriptors: Dynamic Memory (DRAM) (2) Read-Only Memory (ROM) (1) Static Memory (SRAM) (4)   Proper Nouns: There are no proper nouns with reviews under B.3.1.     Reviews limited to: All General Terms Algorithms Design Documentation Economics Experimentation Human factors Languages Legal Aspects Management Measurement Performance Reliability Security Standardization Theory Verification     Reviews about "Semiconductor Memories (B.3.1)": Date Reviewed A SISO register circuit tailored for input data with low transition probability Napoli E., Castellano G., De Caro D., Esposito D., Petra N., Strollo A. IEEE Transactions on Computers 66(1): 45-51, 2017.  Type: Article May 31 2017 Improving write performance by controlling target resistance distributions in MLC PRAM Kim Y., Yoo S., Lee S. ACM Transactions on Design Automation of Electronic Systems 21(2): 1-27, 2016.  Type: Article Apr 19 2016 A hybrid memory built by SSD and DRAM to support in-memory big data analytics Chen Z., Lu Y., Xiao N., Liu F. Knowledge and Information Systems 41(2): 335-354, 2014.  Type: Article May 18 2015 ADOFs and resistive-ADOFs in SRAM address decoders: test conditions and March solutions Dilillo L., Girard P., Pravossoudovitch S., Virazel A., Borri S., Hage-Hassan M. Journal of Electronic Testing: Theory and Applications 22(3): 287-296, 2006.  Type: Article Dec 13 2006 Low-leakage asymmetric-cell SRAM Azizi N., Najm F., Moshovos A. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 11(4): 701-715, 2003.  Type: Article Mar 10 2004
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