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	Browse All Reviews > Computer Systems Organization (C) > Processor Architectures (C.1) > Single Data Stream Architectures (C.1.1) > RISC/CISC, VLIW Architectures (C.1.1...)     RISC/CISC, VLIW Architectures (C.1.1) See Reviews     Reviews limited to: All General Terms Algorithms Design Documentation Economics Experimentation Human factors Languages Legal Aspects Management Measurement Performance Reliability Security Standardization Theory Verification     Reviews in category "RISC/CISC, VLIW Architectures (C.1.1)" Date Reviewed Computational memory: a stepping stone to non-von Neumann computing? Abu Sebastian. YouTube, 01:20:34, published on Mar 8, 2018, stanfordonline, https://www.youtube.com/watch?v=_2Wiql4QSLQ. Type: Video Sep 27 2018 A study of pointer-chasing performance on shared-memory processor-FPGA systems Weisz G., Melber J., Wang Y., Fleming K., Nurvitadhi E., Hoe J.  FPGA 2016 (Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Monterey, CA, Feb 21-23, 2016) 264-273, 2016.  Type: Proceedings Jun 7 2017 Dynamic core allocation and packet scheduling in multicore network processors Iqbal M., Holt J., Ryoo J., de Veciana G., John L. IEEE Transactions on Computers 65(12): 3646-3660, 2016.  Type: Article Mar 31 2017 Design patterns percolating to parallel programming framework implementation Aldinucci M., Campa S., Danelutto M., Kilpatrick P., Torquati M. International Journal of Parallel Programming 42(6): 1012-1031, 2014.  Type: Article May 7 2015 Worst case analysis of decomposed software pipelining for cyclic unitary RCPSP with precedence delays Benabid A., Hanen C. Journal of Scheduling 14(5): 511-522, 2011.  Type: Article May 14 2012 Reducing register pressure in SMT processors through L2-miss-driven early register release Sharkey J., Loew J., Ponomarev D. ACM Transactions on Architecture and Code Optimization 5(3): 1-28, 2008.  Type: Article Feb 27 2009 Lazy instruction scheduling: keeping performance, reducing power Mahjur A., Taghizadeh M., Jahangir A.  Low power electronics and design (Proceeding of the Thirteenth International Symposium on Low Power Electronics and Design, Bangalore, India, Aug 11-13, 2008) 375-380, 2008.  Type: Proceedings Nov 20 2008 more...
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