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Roy, Amitabha
Lausanne, Switzerland
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- 10 of 17 reviews

  The AXIOM software layers
Álvarez C., Ayguadé E., Bosch J., Bueno J., Cherkashin A., Filgueras A., Jiménez-González D., Martorell X., Navarro N., Vidal M., Theodoropoulos D., Pnevmatikatos D., Catani D., Oro D., Fernández C., Segura C., Rodríguez J., Hernando J., Scordino C., Gai P., Passera P., Pomella A., Bettin N., Rizzo A., Giorgi R.  Microprocessors & Microsystems 47, Part B, 262-277, 2016. Type: Article

AXIOM is a project aimed at building a hardware substrate and software layers to target cyber-physical systems (CPS) that interact with users in real-time running applications such as face recognition. The paper should be of interest to any practi...

May 15 2017  
Kim T., Kang J., Kim S., Ha S.  Microprocessors & Microsystems 43(C): 47-58, 2016. Type: Article

This paper deals with the problem of efficiently mapping programs to an accelerator that presents runtime choices about how to map programs to computation elements either because the accelerator configuration is unknown at compile time or because ...

Aug 1 2016  
  Parallel optimal pairwise biological sequence comparison: algorithms, platforms, and classification
Sandes E., Boukerche A., de Melo A.  ACM Computing Surveys 48(4): 1-36, 2016. Type: Article

This comprehensive survey and catalog of techniques in the field of biological sequence alignment covers a large amount of relevant literature ranging from theoretical proposals to practical implementations. This is an excellent read for a practit...

Apr 26 2016  
  Zero-load predictive model for performance analysis in deflection routing NoCs
Weldezion A., Grange M., Jantsch A., Tenhunen H., Pamunuwa D.  Microprocessors & Microsystems 39(8): 634-647, 2015. Type: Article

Modern networks on chip (NoC)-based processors often integrate tens of functional components connected by an on-chip network. The behavior of the network is an important component of overall system performance. A metric that can be derived analyti...

Feb 19 2016  
  Hardware software partitioning of control data flow graph on system on programmable chip
Jemai M., Ouni B.  Microprocessors & Microsystems 39(4): 259-270, 2015. Type: Article

The problem of partitioning the elements of a control flow graph of a computation between dedicated hardware blocks and hard processors/digital signal processors (DSPs) of a system on programmable chip (SOPC) is dealt with in this paper....

Oct 20 2015  
  An FPGA-based parallel architecture for on-line parameter estimation using the RLS identification algorithm
Ananthan T., Vaidyan M.  Microprocessors & Microsystems 38(5): 496-508, 2014. Type: Article

The focus of this paper is the optimization and implementation of a recursive least squares (RLS) algorithm for online parameter estimation in systems. The main thrust deals with optimizations to make the algorithm more amenable for implementation...

May 19 2015  
  Architectural support for data-driven execution
Matheou G., Evripidou P.  ACM Transactions on Architecture and Code Optimization 11(4): 1-25, 2015. Type: Article

Although various approaches for data-driven execution exist, the authors focus on data-driven multithreading (DDM), following up on their previous work in that area. This interesting paper deals with the low-level details of building a complete sy...

Apr 22 2015  
  Cache vulnerability mitigation using an adaptive cache coherence protocol
Maghsoudloo M., Zarandi H.  The Journal of Supercomputing 68(3): 1048-1067, 2014. Type: Article

Soft errors in on-chip cache hierarchies are studied in this paper, and solutions to the problem are proposed. Soft errors are the result of events such as cosmic ray strikes that flip bits held in on-die transistors. Due to shrinking feature size...

Jul 28 2014  
  Scalable relative debugging
Dinh M., Abramson D., Jin C.  IEEE Transactions on Parallel and Distributed Systems 25(3): 740-749, 2014. Type: Article

This paper deals with the problem of debugging large distributed applications, with a focus on high-performance computing (HPC) environments. The authors deal with the technique of relative debugging, where the program state of a correct execution...

Jun 25 2014  
   Massive graph triangulation
Hu X., Tao Y., Chung C.  SIGMOD 2013 (Proceedings of the 2013 ACM SIGMOD International Conference on Management of Data, New York, NY,  Jun 22-27, 2013) 325-336, 2013. Type: Proceedings

A triangle of an undirected graph is simply three vertices of the graph, u, v, and w, which are also connected by the edges (u, v), (v
May 27 2014  
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