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Roy, Amitabha
EPFL
Lausanne, Switzerland
 
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- 10 of 19 reviews

   
  Efficient embedding of scale-free graphs in the hyperbolic plane
Bläsius T., Laue S., Friedrich T., Krohmer A. IEEE/ACM Transactions on Networking 26(2): 920-933, 2018.  Type: Article

This is an interesting paper from the graph embedding domain. Graph embedding deals with mapping the vertices of a graph to points in a space such that the metric distance in that space between vertices corresponds to actual edges of t...

Jan 24 2019  
  A FPGA based implementation of Sobel edge detection
Nausheen N., Seal A., Khanna P., Halder S. Microprocessors & Microsystems 56(C): 84-91, 2018.  Type: Article

This paper examines the problem of optimizing the space requirements and latency for a field-programmable gate array (FPGA) implementation of a Sobel edge detection filter. Sobel edge detection applies horizontal and vertical convoluti...

Sep 13 2018  
  The AXIOM software layers
Álvarez C., Ayguadé E., Bosch J., Bueno J., Cherkashin A., Filgueras A., Jiménez-González D., Martorell X., Navarro N., Vidal M., Theodoropoulos D., Pnevmatikatos D., Catani D., Oro D., Fernández C., Segura C., Rodríguez J., Hernando J., Scordino C., Gai P., Passera P., Pomella A., Bettin N., Rizzo A., Giorgi R. Microprocessors & Microsystems 47, Part B, 262-277, 2016.  Type: Article

AXIOM is a project aimed at building a hardware substrate and software layers to target cyber-physical systems (CPS) that interact with users in real-time running applications such as face recognition. The paper should be of interest t...

May 15 2017  
  SoPHy+
Kim T., Kang J., Kim S., Ha S. Microprocessors & Microsystems 43(C): 47-58, 2016.  Type: Article

This paper deals with the problem of efficiently mapping programs to an accelerator that presents runtime choices about how to map programs to computation elements either because the accelerator configuration is unknown at compile time...

Aug 1 2016  
  Parallel optimal pairwise biological sequence comparison: algorithms, platforms, and classification
Sandes E., Boukerche A., de Melo A. ACM Computing Surveys 48(4): 1-36, 2016.  Type: Article

This comprehensive survey and catalog of techniques in the field of biological sequence alignment covers a large amount of relevant literature ranging from theoretical proposals to practical implementations. This is an excellent read f...

Apr 26 2016  
  Zero-load predictive model for performance analysis in deflection routing NoCs
Weldezion A., Grange M., Jantsch A., Tenhunen H., Pamunuwa D. Microprocessors & Microsystems 39(8): 634-647, 2015.  Type: Article

Modern networks on chip (NoC)-based processors often integrate tens of functional components connected by an on-chip network. The behavior of the network is an important component of overall system performance. A metric that can be der...

Feb 19 2016  
  Hardware software partitioning of control data flow graph on system on programmable chip
Jemai M., Ouni B. Microprocessors & Microsystems 39(4): 259-270, 2015.  Type: Article

The problem of partitioning the elements of a control flow graph of a computation between dedicated hardware blocks and hard processors/digital signal processors (DSPs) of a system on programmable chip (SOPC) is dealt with in this pape...

Oct 20 2015  
  An FPGA-based parallel architecture for on-line parameter estimation using the RLS identification algorithm
Ananthan T., Vaidyan M. Microprocessors & Microsystems 38(5): 496-508, 2014.  Type: Article

The focus of this paper is the optimization and implementation of a recursive least squares (RLS) algorithm for online parameter estimation in systems. The main thrust deals with optimizations to make the algorithm more amenable for im...

May 19 2015  
  Architectural support for data-driven execution
Matheou G., Evripidou P. ACM Transactions on Architecture and Code Optimization 11(4): 1-25, 2015.  Type: Article

Although various approaches for data-driven execution exist, the authors focus on data-driven multithreading (DDM), following up on their previous work in that area. This interesting paper deals with the low-level details of building a...

Apr 22 2015  
  Cache vulnerability mitigation using an adaptive cache coherence protocol
Maghsoudloo M., Zarandi H. The Journal of Supercomputing 68(3): 1048-1067, 2014.  Type: Article

Soft errors in on-chip cache hierarchies are studied in this paper, and solutions to the problem are proposed. Soft errors are the result of events such as cosmic ray strikes that flip bits held in on-die transistors. Due to shrinking ...

Jul 28 2014  
 
 
 
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