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Kavalipati, Paparao

California
 
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Paparao Kavalipati is a software developer and consultant on electronics design automation (EDA) products with expertise in formal verification, logic synthesis, and related technologies. He is currently employed at Tabula Inc. Prior to that, he was a member of the R&D team at major EDA vendors like Mentor Graphics Corp. and Synopsys Inc.

With more than 18 years of experience in the industry, Paparao delivered new features and improvements for a range of products that include programmable logic devices, timing constraint verification, assertion synthesis, RTL compilation, model checking, equivalence checking, and simulation.

Paparao also offers development services and solutions to startup companies.  Working as an independent consultant, Paparao designed and developed a hybrid satisfiability engine for the verification of false paths and multi-cycle paths by formulating them as safety properties.

At Mentor Graphics, Paparao designed and implemented a high-level optimizer for assertion expressions, which benefited the 0in formal product in quickly verifying complex properties written in SVA and PSL. Paparao also contributed to the R&D efforts on low-power design verification, and synthesizing multi-clock SVA. At Synopsys, Paparao crafted various coding refinements to Magellan, Formality, and Scirocco products, covering a broad scope of projects on RTL synthesis, data path equivalence, and simulation speed-up.

His interests span a wide spectrum starting from fundamental algorithms, optimization methods, compilers, and automata theory as embedded in the art of electronics design and verification. Being an industrial researcher, he focuses on theoretical concepts that can relate well to pragmatic applications.

Attracted by the opportunities that Computing Reviews provides for continued learning, Paparao has been volunteering as a reviewer since 2008 and brings a practitioner’s point of view to the articles and books that he reads. He looks forward to keeping in touch with the technological and academic advances while rendering more reviews in the future.

Paparao received his master’s degree from the Indian Institute of Science, Bangalore, in 1996.

 
 
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1
- 10 of 33 reviews

   
  Scatter search for minimizing weighted tardiness in a single machine scheduling with setups
González M., Palacios J., Vela C., Hernández-Arauzo A.  Journal of Heuristics 23(2-3): 81-110, 2017. Type: Article

Scatter search is a heuristic method of generating nonrandom solutions. It systematically explores the solution space by constructing new trial solutions from reference solutions using context knowledge. A standard template of the process consists...

Nov 1 2017  
  A linear algorithm for a perfect matching in polyomino graphs
Lin Y., Zhang F.  Theoretical Computer Science 67582-88, 2017. Type: Article

Perfect matching in a graph is a set of edges where any pair does not share a common vertex and every vertex of the graph is the endpoint of an edge from that set. From the paper’s introduction: “A polyomino graph is a connected finite...

Aug 10 2017  
  Counting and generating permutations in regular classes
Basset N.  Algorithmica 76(4): 989-1034, 2016. Type: Article

The signature of a permutation can be described in terms of two symbols that represent ascent and descent in the ordering of the elements. For each regular language (that can be recognized by a finite-state automaton) over those two symbols, we ca...

May 19 2017  
   Discovering different kinds of smartphone users through their application usage behaviors
Zhao S., Ramos J., Tao J., Jiang Z., Li S., Wu Z., Pan G., Dey A.  UbiComp 2016 (Proceedings of the 2016 ACM International Joint Conference on Pervasive and Ubiquitous Computing, Heidelberg, Germany,  Sep 12-16, 2016) 498-509, 2016. Type: Proceedings

With the accelerating adoption of smartphones in the last decade, mobile applications have become increasingly popular as well, with app stores recording billions of downloads. It is of immense interest to phone manufacturers, carriers, and applic...

Mar 15 2017  
  Space-efficient path-reporting approximate distance oracles
Elkin M., Neiman O., Wulff-Nilsen C.  Theoretical Computer Science 651(C): 1-10, 2016. Type: Article

Graph spanners are sparse subgraphs that preserve distances between nodes of the original graph to an approximation that is bounded, usually given in the form of a multiplication factor known as stretch. Such spanners have application in distance ...

Feb 10 2017  
   Data stream management: processing high-speed data streams
Garofalakis M., Gehrke J., Rastogi R.,  Springer International Publishing, New York, NY, 2016.Type: Book (9783540286073)

Efficient data management is the distinguishing factor for the success of computer applications. Traditional software made use of querying and updating persistent datasets saved in a stable storage format. With growing usage, increased automation,...

Jan 5 2017  
   Mathematical problems in data science: theoretical and practical methods
Chen L., Su Z., Jiang B.,  Springer International Publishing, New York, NY, 2015. 213 pp. Type: Book (978-3-319251-25-7)

Data science includes mathematical and statistical tools required to find relations and principles behind heterogeneous and possibly unstructured data. It is an emerging field, under active research, and the authors here have attempted to explain ...

Sep 8 2016  
  Multipass automata and group word problems
Ceccherini-Silberstein T., Coornaert M., Fiorenzi F., Schupp P., Touikan N.  Theoretical Computer Science 600(C): 19-33, 2015. Type: Article

It is well known that context-free languages (CFLs) can be recognized by pushdown automata. Such machines maintain a stack such that the top of the stack affects the state transitions. During the state transitions, the stack may get modified as we...

Dec 7 2015  
   Practical C++ financial programming
Oliveira C.,  Apress, New York, NY, 2015. 396 pp. Type: Book (978-1-430267-15-7), Reviews: (1 of 2)

Financial programs form a large percentage of C++ applications in the software industry. Starting from tracking fixed income investments and equities, up to option pricing and portfolio optimization, the problems in the domain, and the models used...

Nov 11 2015  
  Verilog HDL simulator technology: a survey
Tan T., Rosdi B.  Journal of Electronic Testing: Theory and Applications 30(3): 255-269, 2014. Type: Article, Reviews: (2 of 2)

The design of modern integrated circuits has become so complex that it is no longer possible to imagine a tool flow that doesn’t start from a specification in a higher-level hardware description language (HDL). Among the available choices, V...

Jun 30 2015  
 
 
 
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